Noble metals such as ruthenium (Ru), iridium (Ir), platinum (Pt) and gold (Au), as well as alloys and oxides thereof, can be used to form electrically conductive layers such as electrodes in semiconductors devices (e.g., capacitors).
FIG. 1A is a cross-sectional view of a conventional semiconductor capacitor C. Referring to FIG. 1A, the semiconductor capacitor C comprises a bottom electrode 21, a dielectric layer 22, and a top electrode 23 sequentially formed on a bottom structure 10.
FIG. 1B is a cross-sectional view of a conventional semiconductor memory device using a transistor as a bottom structure. Referring to FIG. 1B, a first impurity region 12a and a second impurity region 12b are formed in a semiconductor substrate 11, and a gate insulating layer 13 and a gate electrode 14 are formed in a channel region between the first impurity region 12a and the second impurity region 12b. An insulating layer 15 is formed over the first impurity region 12a, the second impurity region 12b and the gate electrode 14. A via is formed through the insulating layer 15 and the via is filled with a conductive material to form a conductive plug 16. The conductive plug may comprise a conductive material such as titanium nitride (TiN). A semiconductor capacitor C, including bottom electrode 21, dielectric layer 22 and top electrode 23, is formed over the conductive plug such that the bottom electrode 21 is in electrical contact with the second impurity region 12b through the conductive plug 16.
One or both of the electrodes in the semiconductor capacitor C may be formed of a single metal, an electrically conductive metal alloy, or an electrically conductive metal oxide. A preferred electrode comprises a noble metal such as Ru, Ir, Pt, or Au. The electrodes 21,23 can be formed using chemical vapor deposition (CVD) or atomic layer deposition (ALD).
During formation of the semiconductor capacitor C, the bottom electrode 21 can be formed on a bottom structure that may comprise an insulating layer (e.g., SiO2), a conductive layer (e.g., TiN), or a semiconducting layer (e.g., Si). The crystal structure of the material(s) forming the bottom structure is typically different than that of a noble metal. As a result, the grain structure of a bottom electrode comprising a noble metal is typically coarse and adhesion of the noble metal to the bottom structure can be poor. A further consequence is that the bottom electrode can have a higher than desired specific resistance.
FIG. 2 is a scanning electron microscope (SEM) image of a ruthenium coating on SiO2. The ruthenium coating was formed using chemical vapor deposition. The ruthenium is irregularly formed and is not uniformly distributed on the SiO2. Further, the adhesion of the ruthenium to the SiO2 is poor.
During formation of a semiconductor capacitor, after the bottom electrode is formed, a dielectric layer is formed on the bottom electrode and both the dielectric layer and bottom electrode can be subjected to high temperature heat-treatment. During the heat-treatment, material comprising the noble metal bottom electrode of FIG. 2 can become further agglomerated, and thus the capacitor device including the bottom electrode cannot be used.
Using an ALD method, a noble metal source gas can be reacted with O2 to form a noble metal layer. However, the reaction with oxygen can result in the incorporation of an excess amount of O2 in the noble metal layer, and accordingly the noble metal electrode can be oxidized. Likewise, a noble metal source gas can be reacted with H2 using the ALD method. However, when only H2 is introduced, the noble metal source gas is not sufficiently decomposed to form the noble metal layer. Accordingly, there is an interest in improved methods of forming noble metal layers suitable for use in semiconductor devices.